Queen's University, Kingston, ON, Canada
CISC 324: Operating Systems
The course deals with the basic concepts of multitasking systems and the foundations of operating systems. The course covers processes and threads management including process creation, execution, management, context switching, and termination, interrupts handling (e.g., hardware interrupts, traps, and exceptions), processes synchronization including critical section problem, synchronization tools (e.g., mutex, semaphores, and monitors), deadlocks, race condition, known classical synchronization problems (e.g., consumer/producer and dining philosophers problems), and memory management covering virtual memory, paging, and segmentation. The course also provides practical mapping (through labs) of what is presented in the course lectures.
Karim Lounis, Goodwin 631, firstname.lastname@example.org.
Lectures are on Monday 8:30am (Stirling Hall B, 64 Bader Lane), Tuesday 10:30am (School of Kinesiology and health studies room 100, 28 Division street), Thursday 9:30am (Humphrey Hall auditorium, 62 Arch street).
Lounis's office hours: Monday 10:30am-12:00pm, Goowdin 241.
The teaching assistants answer questions by email, and in person during office hours. If you have a scheduling conflict with office hours then email the TA to set up an alternate meeting time.
Taher Ahmed Mohammed Ghaleb, email@example.com.
Office hours: Wednesday 10:30am-12:00pm, Goodwin 241.
Thomas Parker, firstname.lastname@example.org.
Office hours: Thursday 10:30am-12:00pm, Goodwin 241.
Omar El Zarif, email@example.com.
Office hours: Monday 2:00pm-3:30pm, Goodwin 241.
Junlu Zhou (a.k.a., Sylvia), firstname.lastname@example.org.
Office hours: Friday 10:30am-12:00pm, Goodwin 241.
Guoliang Zhao, email@example.com.
Office hours: Tuesday 2:00pm-3:30pm, Goodwin 524.
Guoliang Zhao will be marking the second midterm and part of the final exam.
Textbook and Course Reader
The textbook and course reader are for sale at the bookstore:
- Operating System Concepts,
Ninth Edition, by Silberschatz, Galvin and Gagne, published by John Wiley. The eighth edition of this textbook is acceptable as well.
The publisher provides various resources on the
textbook website: click on the image of the textbook to find C/Java source code, a study guide, solutions to practice exercises, review questions, etc.
- CISC 324 Course Reader from last year (by Prof. Dorothea Blostein) can also be used, it contains useful information such as last year course outline, marking scheme, information to supplement the textbook, and instructions for last year labs.
||Jan 7, 8, 10.
||Course info: Introduction, motivation, overview, and review.
Operating system overview: features and provided services
Review computer architecture (Von Neumann model).
Single-processor system and multiprocessor system.
Review of instruction execution cycle.
Process management: processes, process state, and PCB (Process Control Block)
Interrupt system: software and hardware interrupts, interrupts handlers, and system calls.
Context switching, interrupt with and without context switching.
Concurrent processes: fake concurrency and real concurrency.
Notion of threads: threads, types of threads, threads vs processes, and user-level and kernel-level threads.
Direct Memory Access (DMA), device controllers and drivers.
1, 2, and 3.1-3.3.
||Jan 14, 15, 17.
||Jan 21, 22, 24.
Data race problem: Shared data corruption in concurrent programming.
Solving synchronization using boolean (failure).
Critical section problem.
Assignment 1, Lab 1, and Lab 2 [due Jan 22 lecture].
Synchronization mechanisms: mutex and semaphores.
Problem of busy waiting and queue-based implementation.
Semaphores for process ordering and mutual exclusion.
Semaphores implementation on uniprocessor and multiprocessor systems.
Binary and counting semaphores.
Peterson's Algorithm for critical section problem.
Classical synchronization problems: Readers/Writers problem, Dinning philosophers, and Producer/Consumer problem.
Brief introduction on deadlock handling techniques
Resource allocation graph (request, assignment, and claim edges)
5 and 7
||Jan 28, 29, 31.
||Feb 4, 5, 7.
||Deadlock prevention using static rules|
Deadlock avoidance using Banker's algorithm
Deadlock detection and recovery.
Assignment 2 [due Feb 5 lecture].
Memory pyramid, memory types, and backup memories.
Review program processing cycle (Compile, Linking, Loading and executing).
Dynamic linking and dynamic loading.
Logical and physical addresses.
Address binding: Compile time, load time, and runtime address binding.
Memory allocation strategies (contiguous and noncontiguous).
Assignment 3 [due Feb 11 Lecture] and Lab 3 [due Feb 18].
Address space and address translation.
Exam 1 (Feb 14)
7, 8 and 9.
||Feb 11, 12, 14.
||Feb 18, 19, 21.
||Reading week, no class.
||Feb 25, 26, 28
||Memory management continued.
Runtime Address Translation.
Single-level paging memory management scheme.
Virtual address translation in paging.
Translation Look-aside Buffer: TLB-hit and TLB-miss.
Effective memory access time.
Memory protection in paging.
Multilevel paging memory management system.
Segmentation memory management scheme.
Segmentation with paging.
Page fault and segmentation fault
Lab 4 [due Mar 1].
Assingment 4 [due Mar 5].
Page fault handling.
Page replacement algorithms
Thrashing and prevention techniques (working set and PFF)
Process synchronization (Con't)
Introduction to Monitors
Assingment 5 [due Mar 14].
8 and 9
||Mar 4, 5, 7
||Mar 11, 12, 14
||Mar 18, 19, 21.
Monitors (Con't) and Java Monitors|
CPU scheduling (FCFS, RR, PRI, SJF, SRTF, MLQ, MLFQ)
Exam 2 (Mar 19).
Message passing (Primitive signals, Sockets, RPCs)
Lab 5 [due Mar 24].
5.8, 3.4, |
||Mar 25, 26, 28.
||Security in Operating systems|
Security threats: Intentional Vs accidental, attack vs intrusion.
Security aspects: Physical, social, network, software, application, and OS.
Security services in OS: authentication, confidentiality, access control, data integrity, availability, and non-repudiation.
OS threats: Malware, system configuration, programming errors, social threads (phishing & vishing), squatting (Zombie)
Malware (Viruses, Worms, Trojan, Ransomware, Backdoor, Rootkit, Spyware, bots, and Keyloggers), hoax, and pop-up/under.
Prevention tools: Anti-virus, anti-spyware, IDS, IPS, firewall, and honypots.
Buffer overflow on the stack, overflow on the heap, and integer overflow.
||Apr 1, 2, 4.
Security threats in OSs.|
Protection mechanisms in OSs: Access control, ACL, and Capabilities.
Hard Disk Drive scheduling
Operating systems architectures: monolethic and micokernel, layer-based OS and loadable modules.
Assignment 6 [due Apr 2].
Correct and discuss midterm exam 2, and discuss final exam.
Lab 6 [due Apr 6].
2.7, 16.3, 21, and 22.
Assignment general directions:
When an assignment is released on this website the course instructure will let you know during the course lecture or through email
Assignments must be handed in hardcopy at the end of the class on the due date. Late work might not be accepted. If you have to miss a lecture you may hand the assignment in early.
Assignments are to be performed individually. Solutions will be available on onQ after the assignment due date.
Marked assignments are returned in lecture. Assignment papers that are not picked up at the lecture can be picked up at Lounis's office hourse.
Assignment 1 (Assignment_1.pdf) [due Jan 22]
This assignment covers computer architectures, instruction execution cyles, processes management and interrupts. There are theoritical questions as well as practical questions.
Assignment 2 (Assignment_2.pdf) [due Feb 5]
This assignment covers process synchronization, mainly, process precedence graphs, CoBegin and CoEnd program constructs, and semaphore usage for codes synchronization.
Assignment 3 (Assignment_3.pdf) [due Feb 11]
This assignment covers process synchronization, mainly, a classical synchronization problem, critical section problem requirements, process precedence graphs, and CoBegin and CoEnd program constructs.
Assignment 4 (Assignment_4.pdf) [due Mar 5]
This assignment covers memory management, in particular, virtual and physical address, fragmentation, paging, segmentation, and
segmentation with paging.
Assignment 5 (Assignment_5.pdf) [due Mar 14]
This assignment covers memory management, in particular, virtual memory, segment fault, page fault, effective memory access time with page
faults and TLB, and page replacement algorithms.
Assignment 6 (Assignment_6.pdf) [due Apr 2]
This assignment covers monitors, CPU scheduling, and computer system security.
Labs general directions:
When a Lab is released on this website the course instructure will let you know either during the course lecture or through email.
Depending on which group you belong to in the class, you will be requested to send your lab work (source codes and readme.txt file) to a specific TA via email before the fixed due date. Late work might not be accepted.
Labs are to be performed individually. Solutions will be available on onQ after the lab due date.
CISC324 does not have formally scheduled lab sections, so you may complete lab work anytime but not beyond the due dates. If you run into difficulty with a lab, contact a TA by email.
Lab Instructions and Files:
- Lab 1 (Lab_1.pdf) [due Jan 22]
In this lab, there are two exercises. In the first exercise you will be using the C-program in eXer_1.c. In the second exercise, you will be using two C-programs eXer_2.c and count.c.
- Lab 3 (Lab_3.pdf) [due Feb 18]
This lab is challenging because it is your first time writing synchronization code. As a first step, study and execute the given code where readers have priority (course reader page 29). Make sure that you can tell
from looking at the output that readers are indeed getting priority. Then plan how to create code that gives priority to writers. The Java codes for readers having priority are: MainMethod.java which is the main class, Reader.java which defines the readers class, Writer.java which
writers class, RandomSleep.java which defines a class for random sleeping methods (you will need that to simulate a reader that is reading, a writer that is writing, and a reader/writer
then came back to read/write again), and Synch.java which defines the class of semaphores that you will be using.
- Lab 4 (Lab_4.pdf) [due Feb 25]
This lab consists of implementing a synchronization code using Java semaphores to simulate the cars traffic around two regions. A car is initially driving around Barriefield (East of Kingston) then crosses a causeway
westbound to Kingston to enter a petrol station and fill up the fuel tank. Once done, the car drives back to Barriefield crossing the causeway eastbound. Because of roadworks, there is onlt one lane that can be used to
cross westbound or eastbound. You are given the MainMethod.java file that contains the main method, the Car.java file that contains the car
code, the Synch.java file that will contain the semaphores and shared counters, the Semaphore.java that contains the semaphore class, and
the TimeSim.java file that contains an accurate time simulation written by Professor Blostein. The simulated time advances after all threads have reached a sleep() or acquire().
The implementation of timeSim needs an exact count of the number of threads. Therefore, every thread you create has to begin by calling Synch.timeSim.threadStart() and has to end by calling Synch.timeSim.threadEnd().
The car thread code in Car.java shows how to do this. Note that because Java's built-in sleep() method results in inexact timing. For example, if two threads execute a sleep instruction at the same time, the thread that executes sleep(20) may wake up before
the thread that executes sleep(10), you are provided with the TimeSim.java file to have a better precision in your simulation.
- Lab 5 (Lab_5.pdf) [due March 24]
This lab consists of implementing a synchronization code using Java Monitors. It consists of two exercises: (1) The first exercise consists of writing synchronization code using Java Monitors for
the readers-writers problem (starvation free solution). You are given the solution with readers having priority in the following Java files: MainMethod.java, Reader.java, Writer.java, SharedDataStruct.java, and rwMonitor.java. You have to modify the code so that the behaviour reflects a
starvation free solution (2) The second exercise consists of correcting a synchronization code using Java Monitors for the Bounded Buffer problem. You are provided with the following Java
MainThread.java, Producer.java, Consumer.java, and Buffer.java.
- Lab 6 (Lab_6.pdf) [due April 6]
This lab consists of implementing a distributed application using Java sockets and Java RMI(Remote Method Invocation) message passing
technologies to compare multiple page
replacement algorithms. You are provided with the following two java applications: (1)T1.java, T2.java, and (2) Client.java,
Server.java, Server_Interface.java. You can use those
files as your building blocks for the lab. At the end of this lab, you will learn how to write code that involves multiples processes/threads
that communicate and cooperate over the network using message passing to share data and set up synchronization.
Assignments and Labs are 24% (12% for Assignments and 12% for Labs), mid-terms are 26% (13% each), and the final exam is 50%.